1. Field of the Invention
The present invention relates to a piezoelectric device in which a semiconductor integrated circuit and a piezoelectric resonator element are included in a package, and to a method for manufacturing the same.
2. Description of Related Art
In recent years, hard disk drives (HDD), mobile computers, information apparatuses such as IC cards and portable communication apparatuses such as cellular phones, phones for automobiles have undergone dramatic miniaturization. Accordingly, piezoelectric devices such as piezoelectric oscillators, voltage-controlled oscillators (VCXO), temperature-compensated oscillators (TCXO), SAW oscillators, real time clock modules for use in these apparatuses are also required to be smaller and thinner. Also, surface-mounting type piezoelectric devices capable of being mounted on both sides of the circuit board of the device are desired.
An example of a conventional piezoelectric device will be explained using a quartz crystal oscillator shown in structural diagrams of FIGS. 16(A) and 16(B), the quartz crystal oscillator using a semiconductor integrated circuit of single-chip type having an oscillating circuit and an AT-cut quartz crystal resonator as a piezoelectric resonator element.
In the conventional quartz crystal oscillator in FIGS. 16(A) and 16(B), an IC chip 101 having an oscillating circuit is bonded and fixed by a conductive adhesive, etc., to the bottom face of a base 102 formed of a ceramic insulating substrate, is electrically connected by Au wire-bonding lines 103 to input/output electrodes 104 at the external periphery of the bottom face of the base 102. The input/output electrodes 104 are metallized by metal such as tungsten (W), molybdenum (Mo) and are plated in multiple layers by Ni plating and Au plating, etc. More specifically, a plurality of electrodes 108 are provided in the IC chip 101 and the electrodes 108 are electrically connected to the above-described input/output electrodes 104, etc., by the wire-bonding lines 103.
A rectangular-shaped AT-cut quartz crystal resonator 105 is electrically connected to a mounting portion 106 of the base 102 and is fixed thereto by a conductive adhesive or the like. A plated layer at the top portion of the base 102 and a metallic lid 107 are connected by melting a metallic cladding material such as solder formed on the lid 107 at a high temperature so as to provide a hermetic seal, while maintaining an N2 (nitrogen) atmosphere or to a vacuum atmosphere in the inner portion.
The above-described conventional quartz crystal oscillator requires an area around the IC chip 101 for wiring the Au wire-bonding lines 103, and a sufficient height in the direction of the package thickness must be secured to accommodate the loops of the Au wire-bonding lines 103. Also, a gap must be provided between the Au wire-bonding lines 103 and the AT-cut quartz crystal resonator 105. Such a configuration prevents further miniaturization of quartz crystal oscillators.
Objects of the present invention are to solve the above-described problems and to provide at reduced cost a small and thin piezoelectric device, such as a quartz crystal oscillator, which can withstand mechanical impacts and has a thickness of 1 mm or less, and to provide a method for manufacturing the piezoelectric device.
One exemplary embodiment of the present invention is a piezoelectric device including a semiconductor integrated circuit and a piezoelectric resonator element both included in a package, wherein an opening is formed in the center of a base provided with an input/output electrode pattern, the semiconductor integrated circuit is mounted in the center of the opening, and the semiconductor integrated circuit is connected to the electrode pattern on the base through a plurality of bumps.
In another exemplary embodiment of the present invention, in the piezoelectric device described above, the plurality of bumps formed on the semiconductor integrated circuit are formed at regular intervals on the center portion of an active element surface of the semiconductor integrated circuit.
In another exemplary embodiment of the present invention, in the piezoelectric device described above, the plurality of bumps formed on the semiconductor integrated circuit are concentrically formed about the center of an active element surface of the semiconductor integrated circuit.
In another exemplary embodiment of the present invention, in the piezoelectric device described above, a dummy bump is formed on the active element surface of the semiconductor integrated circuit.
In another exemplary embodiment of the present invention in the piezoelectric device described above, the dummy bump formed on the semiconductor integrated circuit is connected to the electrode pattern on the base.
In another exemplary embodiment of the present invention, the piezoelectric device described above further includes a layered part, which surrounds the semiconductor integrated circuit, for mounting the piezoelectric resonator, the layered part including at least two layers, including a first layer and a second layer, wherein an opening of the first layer is formed to be larger than an opening of the second layer.
In another exemplary embodiment of the present invention, in the piezoelectric device described above, each of the plurality of bumps formed on the semiconductor integrated circuit is shaped to have two levels, one having a diameter 0.8 to 0.9 times and the other having a diameter 0.4 to 0.45 times the length of a side of an opening in a pad provided on an active element surface of the semiconductor integrated circuit.
In another exemplary embodiment of the present invention, in the piezoelectric device described above, the base may consist of a ceramic composite substrate.
In another exemplary embodiment of the present invention, in the piezoelectric device described above, each of the plurality of bumps formed on the semiconductor integrated circuit is an Au bump.
In another exemplary embodiment of the present invention, in the piezoelectric device described above, a protrusion is formed in at least one side wall of the base facing the side of the semiconductor integrated circuit.
In another exemplary embodiment of the present invention, in the piezoelectric device described above, the protrusion is formed in each of the side walls of the base facing the two sides along the longitudinal direction of the semiconductor integrated circuit.
In another exemplary embodiment of the present invention, in the piezoelectric device described above, the protrusion formed in the side wall of the base has substantially the same height as, or is higher than, the semiconductor integrated circuit.
In another exemplary embodiment of the present invention, in the piezoelectric device described above, a gap between the protrusion formed in the side wall of the base and the semiconductor integrated circuit is set to a range between 0.05 and 0.15 mm.
Another exemplary embodiment of the present invention is a piezoelectric, device including a semiconductor integrated circuit and a piezoelectric resonator element included in a package, wherein an opening is formed in the center of a base provided with an input/output electrode pattern, a plurality of bumps are formed at two opposing sides of an active element surface of the semiconductor integrated circuit, the semiconductor integrated circuit is mounted in the opening, and the semiconductor integrated circuit is connected to the electrode pattern of the base through the plurality of bumps.
In another exemplary embodiment of the present invention, in the piezoelectric device described above, the plurality of bumps formed on the semiconductor integrated circuit are formed at regular intervals at the center portion of the active element surface of the semiconductor integrated circuit.
In another exemplary embodiment of the present invention, in the piezoelectric device described above, a dummy bump is formed on the active element surface of the semiconductor integrated circuit.
In another exemplary embodiment of the present invention, in the piezoelectric device described above, the dummy bump formed on the semiconductor integrated circuit is connected to the electrode pattern on the base.
In another exemplary embodiment of the present invention, the piezoelectric device described above, further includes a layered part on which the piezoelectric resonator is mounted and which surrounds the semiconductor integrated circuit, the layered part including at least two layers including a first layer and a second layer, wherein an opening of the first layer is formed to be larger than an opening of the second layer.
In another exemplary embodiment of the present invention, in the piezoelectric device described above, each of the plurality of bumps formed on the semiconductor integrated circuit is shaped to have two levels, one having a diameter 0.8 to 0.9 times and the other having a diameter 0.4 to 0.45 times the length of an opening in a pad provided on the active element surface of the semiconductor integrated circuit.
In another exemplary embodiment of the present invention, in the piezoelectric device described above, the base includes a ceramic composite substrate.
In another exemplary embodiment of the present invention, in the piezoelectric device described above, the plurality of bumps formed on the semiconductor integrated circuit are Au bumps.
Another exemplary embodiment of the present invention is a piezoelectric device including a semiconductor integrated circuit and a piezoelectric resonator element included in a package, wherein an opening is formed in the center of a base provided with an input/output electrode pattern is formed, a plurality of bumps are formed at two opposing sides of an active element surface of the semiconductor integrated circuit, the semiconductor integrated circuit is mounted in the center of the opening, and the semiconductor integrated circuit is connected to the electrode pattern through the plurality of bumps by ultrasonic bonding.
In another exemplary embodiment of the present invention, in the piezoelectric device described above, a vibration direction of ultrasonic waves applied to the semiconductor integrated circuit is perpendicular to the two opposing sides of the active element surface of the semiconductor integrated circuit at which the plurality of bumps are formed.
In another exemplary embodiment of the present invention, in the piezoelectric device described above, a printing direction of the electrode pattern on the base and a vibration direction of ultrasonic waves applied to the semiconductor integrated circuit are the same.
In another exemplary embodiment of the present invention, in the piezoelectric device described above, each of the plurality of bumps formed on the semiconductor integrated circuit is shaped to have two levels, one having a diameter 0.8 to 0.9 times and the other having a diameter 0.4 to 0.45 times the length of an opening in a pad provided on the active element surface of the semiconductor integrated circuit.
In another exemplary embodiment of the present invention, in the piezoelectric device described above, each of the plurality of bumps formed on the semiconductor integrated circuit is shaped to have two levels, one being 80 to 90 xcexcm in diameter and 30 to 35 xcexcm in height, and the other being 40 to 45 xcexcm in diameter and 30 to 35 xcexcm in height.
In another exemplary embodiment of the present invention, in the piezoelectric device described above, the base consists of a ceramic composite substrate.
In another exemplary embodiment of the present invention, in the piezoelectric device described above, the plurality of bumps formed On the semiconductor integrated circuit are Au bumps.
In another exemplary embodiment of the present invention, in the piezoelectric device described above, the longitudinal direction of the electrode pattern on the base and a vibration direction of-ultrasonic waves applied to the semiconductor integrated circuit are the same.
In another exemplary embodiment of the present invention, the piezoelectric device described above includes the semiconductor integrated circuit and the piezoelectric resonator element in included in the package, wherein a vibration direction of ultrasonic waves for ultrasonic bonding and for forming bumps on the semiconductor integrated circuit and a vibration direction of ultrasonic waves for performing ultrasonic bonding of the semiconductor integrated circuit to the package are different from each other.
Another exemplary embodiment of the present invention is a method for manufacturing a piezoelectric device including a semiconductor integrated circuit and a piezoelectric resonator element included in a package, the method may include: a step of forming a metallic bump on the semiconductor integrated circuit; a step of connecting the semiconductor integrated circuit on which the metallic bump is formed to the base by ultrasonic bonding; a step of detecting a height direction of the semiconductor integrated circuit during the ultrasonic bonding; a step of mounting the piezoelectric resonator element; and a step of hermetically sealing a metallic lid to the base.
Another exemplary embodiment of the present invention is a method for r manufacturing a piezoelectric device including a semiconductor integrated circuit and a piezoelectric resonator element included in a package, the method may include: a step of forming a metallic bump on the semiconductor integrated circuit; a step of connecting the semiconductor integrated circuit on which metallic bump is formed to the base by ultrasonic bonding; a step of detecting a height direction of the semiconductor integrated circuit during the ultrasonic bonding step; a step of filling an underfill material around the semiconductor integrated circuit so as to cover the entire semiconductor integrated circuit including a rear surface of the semiconductor integrated circuit; a step of mounting the piezoelectric resonator element; and a step of hermetically sealing a metallic lid to the base.